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- November 30th, 2018, 4:34 am
- Forum: Programming/CPU
- Topic: how to use the CPU 4k cache?
- Replies: 6
- Views: 9566
I believe what Bill means is that the CPU-side rendering can be fully on-cache, ie the vertex load, transform, store loop easily fits into the i-cache and therefore the instruction fetch rarely needs to access the bus. It was also common to put the stack on SPAD for most of the frame, swapping back ...