how to use the CPU 4k cache?

[gwald]

https://www.youtube.com/watch?feature=p ... BBk#t=1108
Bill Guschwan @mistagogue was a tool dev at Sony

He's talking about the DMA (bus) while double buffer swapping.
"Load up the polygon transfer loop, staying off the bus so the graphics engine could use it."
What does he mean? load the vertices data into the CPU cache, right after a swap?

[AmiDog]

Not sure what he means, but the CPU doesn't have a data cache. And the GPU has its own memory. Doing DMA from system memory to video memory might be faster if the CPU doesn't access memory at the same time, unless the CPU is halted during DMA anyway...

[Administrator]

Not sure what he means, but the CPU doesn't have a data cache.

Maybe he was talking about the scratch pad?
I actually use the scratch pad in the Menu System for handling polygon data. It's very high speed.
I think that's what he is getting at, but he is just making it sound overly complicated.

... developers

[gwald]

scratch pad is only 1k
Dcache (data) is on the CPU, it's 4k.
It's automatically used.
I think he's talking about the GTE/CPU (maths) using the 4k so the GPU wont be blocked when drawing.

[AmiDog]

The CPU doesn't have a data cache as the 1k which could be used as a data cache is used as scratchpad. It's easy to verify. It might be possible to put the data cache in normal mode (haven't tested that yet), but it would still only be 1k.

The CPU has a 4k instruction cache though (which is automatically used).

[Administrator]

It might be possible to put the data cache in normal mode (haven't tested that yet), but it would still only be 1k.

I believe the memory controller handles that because you can disable the cache, but having it on executes code faster. There was a document that explained this somewhere. It's been a while...

[yadokari]

I believe what Bill means is that the CPU-side rendering can be fully on-cache, ie the vertex load, transform, store loop easily fits into the i-cache and therefore the instruction fetch rarely needs to access the bus. It was also common to put the stack on SPAD for most of the frame, swapping back to main RAM for system calls.