Really old mod chips

General information to do with the PlayStation 1 Hardware. Including modchips, pinouts, rare or obscure development equipment, etc.
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TriMesh
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Really old mod chips

Post by TriMesh » June 7th, 2017, 12:05 am

In view of the discussions about these things, I guessed some of you might be interested (or at least amused) by a really early example. This is a 1-655-433-13 PU-7 board out of a SCPH-1000, and the chip is a fairly typical example of those 1st generation chips.

The first thing you might notice is that the chip seems to have 14 pins - it's actually an 18 pin PIC16C54 with 4 pins chopped off and the part number erased. There were 2 reasons for this - the first was to hinder identification of the device, the second was that the removed pins were the ones used for the programming functions, so even if the chip was identified it would make it harder to dump.

The second thing is that it has a lot of wires - 10 including the ground connection. They do actually all do something.

The first 2 obvious ones are power and ground. There is also a clock input (these old PICs didn't have internal oscillators, so the 4MHz clock was picked off the HC05), the reset line (MCLR/ - wired to the reset input on the HC05), the door open switch, two wires to the RF amp chip (connected to FOK and the SENS output, which I think was outputting FZC), a wire to the X1/X2 select line, and finally the two wires connected to the area of IC707, which are the gate and data wires we all know so well. The reason for the connections to the servo amp was to enable the chip to determine if the console was actually reading the data yet and not transmit the SCEx strings until it did.
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rama3
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Post by rama3 » June 7th, 2017, 12:46 am

Especially funny considering how easily a PU-7 is satisfied :)

I found this bit of code that might be similar to what's on that chip.
Edit: Nah, this is far simpler code. Still, at least it's really old as well! :p

Code: Select all

;
;       PIC16C54 version of the "v5.0" serial data chip emulation.
;       Written by the Old Crow (Scott Rider) on 22-FEB-97
;
;       Revision History:
;
;       P1.01v5 on 19-JAN-97    ;Uses v5.0 chip data
;       P1.05   on 29-JAN-97    ;Uses ASCII version of v5.0 data
;
;       This version uses Microchip assembler mnemonics and the
;       Microchip MPASM assembler.  Default config options are set
;       in the __FUSES line below: CP off, WDT off, OSC=XT.
;
;       Chip is connected in 6-wire fashion:
;
;                       _______  _______
;                      |       \/       |
;                RA2 --+ 1           18 +-- RA1
;                      |                |
;                RA3 --+ 2           17 +-- RA0
;                      |                |
;               RTCC --+ 3         >>16 +-- OSC1/CLKIN
;                      |                |
;              !MCLR --+ 4 <<        15 +-- OSC2/CLKOUT
;                      |                |
;                Vss --+ 5 <<      >>14 +-- Vdd
;                      |                |
;                RB0 --+ 6           13 +-- RB7
;                      |                |
;                RB1 --+ 7 <<        12 +-- RB6
;                      |                |
;                RB2 --+ 8 <<        11 +-- RB5
;                      |                |
;                RB3 --+ 9           10 +-- RB4
;                      |                |
;                      +----------------+
;
;       ">>" and "<<" indicate connected pins.  Refer to PC board diagrams
; available on the internet.
;
	list    p=16c54
	radix   dec
	include "p16c5x.inc"

	__FUSES _CP_OFF & _WDT_OFF & _XT_OSC    ;Set default config

	cblock  0x08    ;Store variables above control registers 

		i       ;Loop counters
		j
		k       ;/
		x       ;Used by delay routine
		y       ;/
		xmit    ;Transmit data holding register
		index   ;Index register for table lookups
	endc

	org     0x00            ;Start of code space 
;
;  Support routines
;
;  dly50  -- entry for 50ms delay
;  dly_ms -- entry with number of ms in w (1 to 255)
;
dly50   movlw   50              ;Enter here for a 50ms delay
dly_ms  movwf   x               ;/

dy_0    movlw   249             ;1ms loop count
	movwf   y               ;/

dy_1    nop                     ;Delay loop
	decfsz  y,F
	goto    dy_1
	
	decfsz  x,F
	goto    dy_0
	
	retlw   3               ;w=3 default for sendln
;
;  sendln -- send 4-byte line(s) with a 72ms marker at head of line.
;  Enter with number of lines in w.
;
sendln  movwf   i               ;Do this many lines

sl_0    movlw   72              ;Delay 72ms
	call    dly_ms

	movlw   4               ;Do 4-byte line
	movwf   j               ;/

sl_1    movf    index,W         ;Restore index
	call    lines           ;Get a data byte..
	movwf   xmit            ;..into xmit buffer
	comf    xmit,F          ;Invert for sending
;
;       Send a byte on rb.1.  LSB first, 4ms/bit (250 bps) with one
;  start bit and two stop bits per byte.  Instead of setting and
;  clearing the port bit, the port's direction is changed.  The actual 
;  port register is set to zero, so that when the port bit is directed 
;  to be an output, it automatically goes low.  Directing the port bit 
;  to be an input floats the I/O pin, and the external pullup creates 
;  the high.  This allows open-collector operation of the port bits.
;
	movlw   8               ;8 bits to send
	movwf   k

	movlw   b'11111011'     ;Start bit on pin 7=1
	tris    PORTB

	movlw   4               ;4ms bit-time
	call    dly_ms

sl_2    rrf     xmit,F          ;Get a bit..

	movlw   b'11111001'     ;Keep port bits low when outputs
	movwf   PORTB           ;/

	btfsc   STATUS,C        ;High or low?
	movlw   b'11111011'     ;Set pin 7 high via port direction control
	btfss   STATUS,C        ;High or low?
	movlw   b'11111001'     ;Set pin 7 low via port direction control

	tris    PORTB           ;Set the port
	
	movlw   4               ;Delay 4ms
	call    dly_ms

	decfsz  k,F             ;Do all bits requested
	goto    sl_2

	movlw   b'11111001'     ;Stop bits
	tris    PORTB

	movlw   8               ;Two 4ms stop bit times
	call    dly_ms
;
;
	incf    index,F         ;Point to next
	decfsz  j,F
	goto    sl_1

	decfsz  i,F             ;Do specified number of lines
	goto    sl_0
	
	retlw   3               ;w=3 default for next pass
;
;    Data block.  This data was determined by Zohmann Friedrich and
;    Johannes Scholler from a "v5.0" PIC16C54 mod chip and was
;    originally written in its MSB-first start/stop bits-embedded form:
;    9 A9 3D 2B A5 and a final byte of B4 (SCEI), F4 (SCEA) or 74 (SCEE).
;
lines   addwf   PCL,F   ;Get index into table                 
	dt      'S','C','E','I' ;Japanese/NTSC
	dt      'S','C','E','A' ;U.S./NTSC
	dt      'S','C','E','E' ;European/PAL
;
; Main program loop.
;
	org     0x0100

start   movlw   b'00000010'     ;Set TMR0 prescaler = 1:8 (f_osc=4MHz)     
	option                  ;/

	movlw   b'11111111'     ;Make all port bits inputs initially
	tris    PORTA
	tris    PORTB           ;/

;        
;  Step 1 -- approx. 50ms after reset, I/O pin 7 goes low.
;
	call    dly50           ;Delay 50ms
	
	bcf     PORTB,1         ;Make sure it's low
	movlw   b'11111101'     ;Make rb.1 low via port direction
	tris    PORTB           ;/
;
;  Step 2 -- approx. 850ms later I/O pin 8 goes low.
;        
step2   movlw   17              ;17 x 50ms = 850ms
	movwf   i               ;/

s2_0    call    dly50
	decfsz  i,F
	goto    s2_0            ;/

	bcf     PORTB,2         ;Make sure it's low
	movlw   b'11111001'     ;Make rb.2 (and keep rb.1) low
	tris    PORTB           ;/
;
;  Step 3 -- wait approx. 314ms
;
step3   movlw   6               ;6 x 50ms = 300ms
	movwf   i               ;/

s3_0    call    dly50
	decfsz  i,F
	goto    s3_0            ;/

	movlw   14              ;Final 14ms
	call    dly_ms
;
;  Step 4 -- clock out all three datagrams on rb.1 ad infinitum.
;
step4   clrf    index           ;Do first line
	call    sendln
	goto    step4
;
;  Reset vector.  (16C5x only!)
;
	org     0x01FF
	goto    start
;
; That's all, folks!
;
	end

likeabaus
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Post by likeabaus » June 7th, 2017, 4:27 am

Holy cow! I never realized 10-wire chips ever existed for the old psx. I always thought the first gen chips were the old 4-wire pic12's that spammed the sceX code indefinetely XD

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