replacing the bios with a custom piece of bareboard firmware

[legacy]

why ? because i'd like to have a MIPS board to toy with, directly in assembly and C, without having to fight with the magic of what SONY has put inside her Mask Rom.

I'd like to have only the SIO support and nothing else except the PAD.

I have desoldered the PSOne bios and wire soldered all the bios pinout to a DIP socket in where to put a an Eprom Emulator, which is an equipment i can use to run my code.

The question is what do you suggest to put into this bareboard piece of firmware in order to initialize the hardware in a so called "early bootstrap" ?


This topic is useful for SIO (C code inside)

This site is providing useful toolchain and BSP code (C code inside)

[legacy]

About the PAD ... it may be it is similar to SPI, it is not clear to me how it works, but it may be it could be used to attach an SPI-ethernet board to be used with UDP/IP in order to have a faster upload/download.

This topic is about CPU-SIO-PAD

[legacy]

i could look for the Yamon (1) source code in order to write an extremely easy and essential earlyboot ? what do you think ?


(1) it is the firmware used in Atlas and Malta boards, developed by MIPS inc
I've got an Atlas board, it is MIPS32-r2, while PSX is MIPS-R3K ...

[legacy]

OK, today i desoldered an other playstation bios, i am pretty ready for the eprom emulator

could someone suggest me a bit of early boot assembler ? just the first things the R3000 should do in order to be pretty initialized.

[Administrator]

FASTBOOT.S

[legacy]

Thanks, i am also studying yaboot, pretty sources for R3000, too

Everything You Have Always Wanted to Know about the Playstation
But Were Afraid to Ask.

[...]

The R3000A is configured for litle-endian byte order and defines a word as 32-bits, a half-word, as 16-bits, and a byte as 8-bits.

The Status register contains all the major status bits ...
status.RE Reverse Endianness. The R3000A allows the system to determine the byte ordering convention for the Kernel mode, and the default setting for user mode, at reset time. If this bit is cleared, the endianness
defined at reset is used for the current user task. If this bit is set, then the user task will operate with the opposite byte ordering convention from that determined at reset. This bit has no effect on kernel mode.

Well, about Sony R3000, it is little endian, is it possible to set it as big endian ? I mean, really possible ? Never tested ? Just because if it is possible i can use the same toolchain i am using for Atlas board (MIPS32-rev2, configured as bigendian)

This bit has no effect on kernel mode.

i think it is not correct, from what i read in the handbook, if you set the RE you change the whole Endianness, in both kernel and userland.

[TriMesh]

i think it is not correct, from what i read in the handbook, if you set the RE you change the whole Endianness, in both kernel and userland.

I don't know how the PSX handles it, but on the embedded MIPS CPUs I've used in the past, the RE bit only applies to user mode.

If you wanted to change the default endianness of the system, you had to move a jumper on the evaluation board and reflash the boot PROM. The endian select was one of the CPU mode bits, which were (on that specific CPU) programmed by driving certain high-order data bus bits either high or low while reset was active.

I don't think there is anything similar on the PSX CPU.