Re: BIOS region check routine bypassing
Posted: May 17th, 2018, 5:53 am
The file attached in this thread describes the SSBUSC configuration registers. Some features are missing in PS1 mode (which should be the same as on the PS1).
https://assemblergames.com/threads/the- ... ost-960878
The PS2 has a functioning /WAIT signal but not all devices have it enabled (and I think some didn't support it at all), so even if the PS1 had one, it would have probably not been enabled for the BOOT ROM.
I have tried patching the PS2 BOOT ROM with an overclocked (to ~ 20MHz*4) PIC MCU, but the number of instructions necessary to modify the data (~10 per BOOT ROM read cycle) were too many, so it was still too slow to work. At the end, for the test I was doing, I ended-up using a (72 macrocell) CPLD.
BTW, RAM I/O is configured through another register - 0x1F801060.
One way to use a slower MCU (although it would still need to be pretty fast) for patching the ROM, would be to use the PS1 CPU clock for the MCU and use this synchronization to remove the need for synchronization instructions in software (i.e. once the code detects that it should start patching, you would know exactly for how many cycles it would have to output each byte and when to switch to the next).
https://assemblergames.com/threads/the- ... ost-960878
The PS2 has a functioning /WAIT signal but not all devices have it enabled (and I think some didn't support it at all), so even if the PS1 had one, it would have probably not been enabled for the BOOT ROM.
I have tried patching the PS2 BOOT ROM with an overclocked (to ~ 20MHz*4) PIC MCU, but the number of instructions necessary to modify the data (~10 per BOOT ROM read cycle) were too many, so it was still too slow to work. At the end, for the test I was doing, I ended-up using a (72 macrocell) CPLD.
BTW, RAM I/O is configured through another register - 0x1F801060.
One way to use a slower MCU (although it would still need to be pretty fast) for patching the ROM, would be to use the PS1 CPU clock for the MCU and use this synchronization to remove the need for synchronization instructions in software (i.e. once the code detects that it should start patching, you would know exactly for how many cycles it would have to output each byte and when to switch to the next).